Case study
Taking PicoRV32 through OpenLane.
An academic exploration of processor configuration, physical implementation, and timing tradeoffs.
- When
- January – April 2022
- Where
- NITK · Prof. Ramesh Kini
- Team
- Kruti Deepan Panda and Rahul Magesh
The question
How do processor configuration choices translate into physical-design constraints? Our EC383 project explored PicoRV32 configurations through OpenLane using SkyWater 130nm technology.
Architecture and implementation
We compared PCPI-enabled configurations, AXI interfaces, multiplication, and two-cycle ALU and comparison options. Routing memory demands led us to focus on the base core with PCPI. Our contribution was configuration exploration and implementation-flow tuning; PicoRV32 and OpenLane are upstream projects.
Decisions and verification
We adjusted synthesis strategy, density, and clock-related settings while investigating timing and routing issues.
Implementation results
The documented runs, reports, and layout views trace the configuration changes through the OpenLane flow. This work covers implementation-flow exploration and does not include fabricated-silicon measurements.