RISC-V, from RTL to layout.
Exploring PicoRV32 configurations and physical-design tradeoffs through OpenLane.
Read the case study →Silicon / Systems / Software
Silicon Design Engineer 2 at AMD.
I build mixed-signal models, automate engineering workflows, and verify the systems behind complex silicon.
Analog mixed-signal · CAD automation · Formal verification
Exploring PicoRV32 configurations and physical-design tradeoffs through OpenLane.
Read the case study →A standard-cell ALU in Magic VLSI, checked through an automated simulation workflow.
Read the case study →My final thoughts on how my experiments with Antigravity went.